Estudio de arco eléctrico en baja tensión del Bloque E de la Universidad Politécnica Salesiana mediante el Simulador ETAP

Abstract

In this report, the importance of following and respecting safety rules related to arcing due to fault currents is discussed in detail. It focuses specifically on the point of occurrence of the fault and the overcurrent protection switch. The analysis is performed in the context of low voltage arcing, following the guidelines established by IEEE 1564 - 2018.The study is carried out by applying these standards to the UPS-G Building E at the centennial campus. The tool used for this purpose is the Etap software, which allows the simulation of two ground fault methodologies. These simulations are performed both at the output of the main transformer and at the load center of the motors and generators laboratory, with the objective of evaluating the electric arcs generated in both scenarios. The results obtained provide a clear view of the risks associated with fault currents and arcing in the analyzed environment. Based on these findings, specific safety recommendations are formulated for both the main circuit breaker and the load center of the aforementioned laboratory. These recommendations are designed to minimize potential risks and ensure a safe working environment in relation to arc flash generation. This work highlights the importance of rigorous observance of safety standards in the handling of fault currents and electric arcs, providing a practical application of these standards in a specific environment and proposing concrete measures to mitigate the identified risks.